LAR method : From algorithm to synthesis for an embedded low complexity image coder

Embedded image codecs have generally strong constraints in terms of speed, latency and complexity. We introduce in this paper a dedicated coder implementation of the LAR coding technique, suitable for high image compression rates. The general concepts of the LAR codec is firstly described. Then, a low complexity architecture is detailed. This architecture is composed of parallel and pipelined stages, and presents limited requirements for both memory and computation power. Comparative results with FPGA solutions for JPEG and JPEG2000 are finally discussed.