InP based FET structure grown and processed at extremely low temperatures of 280°C

Author

Henle, B. ; Lipka, M. ; Kohn, E.

Author_Institution

Dept. of Electron. Devices & Circuits, Ulm Univ., Germany

fYear

1997

fDate

11-15 May 1997

Firstpage

165

Lastpage

168

Abstract

A technological concept for a InP-HFET structure fully grown and processed at a low temperature of 280°C is presented. It is based on low temperature grown (LTG) InP used as a auto-doped channel material and LTG-AlInAs as buffer and Schottky layer. Design and optimization, especially the transition from the P containing to the As containing compounds of the Schottky gate heterostructure contact layer is discussed. The proof of concept is demonstrated with a first FET device

Keywords

III-V semiconductors; aluminium compounds; chemical beam epitaxial growth; field effect transistors; gallium arsenide; indium compounds; semiconductor growth; semiconductor technology; 280 C; AlInAs buffer layer; AlInAs-GaInP-AlInAs-InP; GaInP barrier; InP; InP-HFET structure; Schottky gate heterostructure contact layer; Schottky layer; auto-doped channel material; buffer layer; gas-source MBE; gate diode characteristics; low temperature growth; low temperature processing; optimization; Buffer layers; Charge carrier density; Circuits; Conducting materials; Electron devices; FETs; Gallium arsenide; Indium phosphide; Sheet materials; Temperature distribution;

fLanguage

English

Publisher

ieee

Conference_Titel

Indium Phosphide and Related Materials, 1997., International Conference on

Conference_Location

Cape Cod, MA

ISSN

1092-8669

Print_ISBN

0-7803-3898-7

Type

conf

DOI

10.1109/ICIPRM.1997.600080

Filename

600080