Determining two-port S-parameters from a one-port measurement using a novel impedance-state test chip

A novel custom high-speed test chip and data reduction technique that allows for the accurate determination of the two-port S-parameters of a passive network from a set of one-port measurements is presented. A typical application for this technique is high-speed integrated circuit package characterization where one-port is of a microelectronic size scale and inside the package. The test chip is designed to operate up to 20 GHz.