Title :
Proceedings Seventh International Symposium on Asynchronous Circuits and Systems. ASYNC 2001
Abstract :
Presents the cover from the proceedings of this conference.
Keywords :
asynchronous circuits; circuit optimisation; digital arithmetic; formal verification; logic CAD; performance evaluation; architecture; arithmetic; communication; handshaking; optimisation; performance analysis; synthesis; verification;
Conference_Titel :
Asynchronus Circuits and Systems, 2001. ASYNC 2001. Seventh International Symposium on
Conference_Location :
Salt Lake City, UT, USA
Print_ISBN :
0-7695-1034-5
DOI :
10.1109/ASYNC.2001.914062
