Title :
A unified DCT/IDCT architecture for VLSI implementation
Author :
Parkhurst, J.R. ; Current, K.W. ; Jain, A.K. ; Grishaw, J.E.
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA
Abstract :
A unified discrete cosine transform/inverse discrete cosine transform (DCT/IDCT) architecture suitable for VLSI implementation is presented. A single VLSI NMOS chip design and layout for realizing this architecture is described. Algorithm simulations and experimental performance of integrated test subcircuits indicate that this chip would be capable of real-time processing of 10-MHz video signals. It is considered that circuits of this type could be very useful in real-time image data compression
Keywords :
VLSI; computerised picture processing; field effect integrated circuits; transforms; video signals; 10 MHz; DCT/IDCT architecture; VLSI NMOS chip; algorithm simulations; design; discrete cosine transform; integrated test subcircuits; inverse discrete cosine transform; layout; real-time image data compression; real-time processing; video signals; Chip scale packaging; Circuit testing; Computational modeling; Computer architecture; Discrete cosine transforms; Forward contracts; Hardware; MOS devices; Signal processing; Very large scale integration;
Conference_Titel :
Acoustics, Speech, and Signal Processing, 1988. ICASSP-88., 1988 International Conference on
Conference_Location :
New York, NY
DOI :
10.1109/ICASSP.1988.197016
