Experimental and simulation study of boron segregation and diffusion during gate oxidation and spike annealing

Author

Ghetti, A. ; Benvenuti, A. ; Molteni, G. ; Alberici, S. ; Soncini, V. ; Pavan, A.

Author_Institution

Central R&D, STMicroelectronics, Agrate Brianza, Italy

fYear

2004

fDate

13-15 Dec. 2004

Firstpage

983

Lastpage

986

Abstract

In this paper, we address the problem of boron channel profile dependence on active area width due to lateral segregation. Boron segregation at the Si/SiO₂ interface and boron diffusion in silicon are experimentally characterized by means of 1D SIMS. Used samples explore the process conditions typical of both channel formation (low dose/gate oxidation) and p⁺ ultra shallow junction formation (high dose/spike annealing). A comprehensive simulation model of boron segregation/diffusion is calibrated to reproduce a large variety of experimental conditions with an unique set of parameters. The calibrated model is then exploited to investigate the dependence of device electrical parameters on active area width.

Keywords

annealing; boron; oxidation; segregation; silicon; silicon compounds; 1D SIMS; B; Si-SiO₂; active area width; boron channel profile dependence; boron diffusion; boron segregation; channel formation; device electrical parameter; gate oxidation; lateral segregation; model calibration; silicon interface; spike annealing; ultra shallow junction formation; Boron; Doping; FinFETs; Flash memory cells; MOSFET circuits; Oxidation; Research and development; Semiconductor process modeling; Silicon; Simulated annealing;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International

Print_ISBN

0-7803-8684-1

Type

conf

DOI

10.1109/IEDM.2004.1419351

Filename

1419351