Mapping algorithms to VLSI array processors

The authors present a systematic methodology for mapping commonly used digital signal processing algorithms to VLSI array processors, such as the systolic array and the wavefront array. A concise description of the proposed methodology is presented to show the flexibility and usefulness of the method. The advantages of this methodology include: (1) algorithms in different expressions, such as sequential programs, signal flow graphs, or dataflow graphs can be mapped to array processors easily; (2) the mapping procedure is systematic and optimal designs can be efficiently searched; and (3) the methodology can be automated as software tools to assist the array processor designers