Title :
An improved etchback planarization process using a super planarizing spin-on sacrificial layer
Author :
Ting, Chiu H. ; Pai, Pei-Lin ; Sobczack, Zbignew
Author_Institution :
Intel Corp., Santa Clara, CA, USA
Abstract :
Summary form only given. An improved process that uses a novel thermal flow/thermal setting polymer that can planarize even the largest geometries after a reflow at 200°C is described. The planarization properties of this novel polymer were determined by coating it over 1.0-μm step heights of different widths. The step heights over the line structure before and after the polymer coating were measured using a profilometer. A 1.2-μm thick coating was used in these studies. The planarization etch was carried out in a reactive-ion-etching system. The etch rates of SiON depended weakly on the oxygen content, while the etch rates of the new organic material are a strong function of the oxygen content. Due to local loading effects, the etch rate ratio of the polymer to the CVD dielectric film cannot be maintained at a 1:1 ratio as measured by test wafers. In fact, the ratio has to be considerably less than 1 to give a planarized surface
Keywords :
polymer films; semiconductor technology; sputter etching; 1.2 micron; 200 degC; SiON; etchback planarization process; local loading effects; micron site heights; planarization properties; polymer coating; reactive-ion-etching system; semiconductor fabrication; spin-on sacrificial layer; super planarizing; thermal flow/thermal setting polymer; Coatings; Dielectric films; Educational institutions; Etching; Geometry; Horses; Planarization; Polymer films; Resists; Scalability;
Conference_Titel :
VLSI Multilevel Interconnection Conference, 1989. Proceedings., Sixth International IEEE
Conference_Location :
Santa Clara, CA
DOI :
10.1109/VMIC.1989.78045