Efficient design of memory based on quantum-dot Cellular Automata

Quantum-dot Cellular Automata (QCA) has been investigated as an alternative to the current CMOS technology. The line-based memory around QCA provides a significant improvement over the conventional memory architectures, because of its bi-directional flow of signals. This work proposes a more efficient memory design around line based memory introducing parallel read. The proposed supporting logic enables realization of such a high speed memory system. Its power to execute simultaneous read write operation is exploited in designing digital signal processors.