• DocumentCode
    3007667
  • Title

    Doubly pipelined Cordic array for digital signal processing algorithms

  • Author

    Sung, Tze-Yun ; Hu, Yu-Hen ; Yu, H.J.

  • Author_Institution
    National Taiwan University, Taipei, Taiwan, R.O.C.
  • Volume
    11
  • fYear
    1986
  • fDate
    31503
  • Firstpage
    1169
  • Lastpage
    1172
  • Abstract
    In this paper, we present a doubly pipelined VLSI Cordic array processor for digital signal processing computations. The basic notion of doubly pipelined CORDIC computation will be introduced first. Then, some potential applications to digital signal processing problems will be discussed. Specifically, we shall demonstrate how a doubly pipelined CORDIC processor array can be applied to compute discrete Fourier transform and Fast Fourier transform, to implement Lattice filters, to solve Toeplitz systems as well as matrix QR factorizations. It is shown that by adopting a secondary pipelining, about one third hardware can be saved, and sometimes the throughput of the entire CORDIC processor array may be doubled.
  • Keywords
    Digital signal processing; Discrete Fourier transforms; Fast Fourier transforms; Filters; Hardware; Lattices; Pipeline processing; Signal processing algorithms; Throughput; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '86.
  • Type

    conf

  • DOI
    10.1109/ICASSP.1986.1169138
  • Filename
    1169138