A 5V-only 16M flash memory using a contactless array of source-side injection cells

Author

Tsao, S.C. ; Frayer, J.E. ; Pang, C.S. ; Ma, Y. ; Kwon, K. ; Choi, Y. ; Kim, D. ; Kim, J. ; Park, J.

Author_Institution

Bright Microelectron. Inc., Santa Clara, CA, USA

fYear

1995

fDate

8-10 June 1995

Firstpage

77

Lastpage

78

Abstract

The source side injection technology coupled with a modified virtual ground contactless array architecture is effective in addressing high density FLASH requirements. We describe a single supply 16 Mbit chip developed in a 0.7 /spl mu/m triple-poly double metal process using a 3.36 /spl mu/m/sup 2/ cell. The design challenge is to implement all the necessary array interface circuitry while maintaining a high array-to-chip area efficiency. This implementation requires unique decoding circuitry on the bitlines and cell control gates.

Keywords

CMOS memory circuits; EPROM; memory architecture; 0.7 micron; 16 Mbit; 5 V; area efficiency; bitline decoding; chip architecture; contactless array; control gates; flash memory; interface circuitry; source-side injection cells; triple-poly double metal process; virtual ground; CMOS technology; Coupling circuits; Decoding; Delay effects; Electrons; Flash memory; Low voltage; Microelectronics; Repeaters; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 1995. Digest of Technical Papers., 1995 Symposium on

Conference_Location

Kyoto, Japan

Print_ISBN

0-7800-2599-0

Type

conf

DOI

10.1109/VLSIC.1995.520693

Filename

520693