A VLSI design and cost analysis of broadband ATM switch elements

Author

Shi, Hong ; Ennis, Damon ; Fernandez, Silvio ; Zukowski, Charles ; Wing, Omar

Author_Institution

Dept. of Electr. Eng., Columbia Univ., New York, NY, USA

fYear

1994

fDate

19-23 Sep 1994

Firstpage

331

Lastpage

336

Abstract

This paper presents a design of a combined input/output-buffered ATM switch. Its basic elements are implemented using CMOS technology and HDL-based design. The impact of the system and implementation parameters on silicon area and transistor count is studied in detail for the first time, and VLSI cost functions are proposed. The purpose of this paper is to provide a VLSI cost analysis for a novel switch design optimization methodology, proposed in another paper

Keywords

CMOS digital integrated circuits; VLSI; application specific integrated circuits; asynchronous transfer mode; circuit CAD; circuit optimisation; integrated circuit design; logic CAD; packet switching; semiconductor switches; CMOS technology; HDL-based design; OASIS; VLSI cost functions; VLSI design; broadband ATM switch elements; combined input/output-buffered ATM switch; cost analysis; switch design optimization methodology; Asynchronous transfer mode; CMOS technology; Cost function; Delay; Design optimization; Fabrics; Packet switching; Switches; Telecommunication switching; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Conference and Exhibit, 1994. Proceedings., Seventh Annual IEEE International

Conference_Location

Rochester, NY

Print_ISBN

0-7803-2020-4

Type

conf

DOI

10.1109/ASIC.1994.404546

Filename

404546