DocumentCode :
301075
Title :
Equivalence between SP2 high-performance switches and three-stage Clos networks
Author :
Ten Bruggencate, Monika ; Chalasani, Suresh
Author_Institution :
Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
Volume :
1
fYear :
1996
fDate :
12-16 Aug 1996
Firstpage :
1
Abstract :
In this paper we prove the functional equivalence of SP2 switches and rearrangeable three-stage Clos networks. From this equality we derive results on routing communications in SP2 switches. The present an algorithm using centralized control which can route any permutation in one pass through SP2 switches, for various system sizes. Further, we present a distributed control algorithm which can route the important class of linear-complement permutations through SP2 switches. Our results not only highlight the capabilities of SP2 switches, but also demonstrate how to efficiently route permutations at the application level
Keywords :
multiprocessor interconnection networks; parallel architectures; performance evaluation; SP2 switches; distributed control algorithm; functional equivalence; linear-complement permutations; routing communications; three-stage Clos networks; Casting; Centralized control; Communication switching; Control systems; Distributed control; Drives; Joining processes; Network topology; Routing; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Processing, 1996. Vol.3. Software., Proceedings of the 1996 International Conference on
Conference_Location :
Ithaca, NY
ISSN :
0190-3918
Print_ISBN :
0-8186-7623-X
Type :
conf
DOI :
10.1109/ICPP.1996.537136
Filename :
537136
Link To Document :
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