DocumentCode
3011457
Title
Digital foreground calibration methods for SAR ADCs
Author
Li, Wei ; Wang, Tao ; Temes, Gabor C.
Author_Institution
School of Electrical Engineering and Computer Science, Oregon State University, Corvallis, 97331, USA
fYear
2012
fDate
20-23 May 2012
Firstpage
1054
Lastpage
1057
Abstract
New foreground digital calibration methods are proposed for successive approximation register (SAR) analog-to-digital converters (ADCs) to reduce the performance loss due to digital-to-analog converter (DAC) mismatch. A set of calibration coefficients which represent the actual weights of the specified patterns is obtained during foreground calibration, and then used during normal operation to correct the SAR ADC output using only a few multiplexers and an accumulator. The simulation results of a 10-bit SAR ADC with the proposed calibration methods show almost 10 effective number of bits (ENOB) with up to 0.5 % binary-weighted DAC mismatch, and more than 12 dB SNDR improvement for even larger DAC mismatch, compared to that without calibration.
Keywords
Arrays; Calibration; Capacitance; Capacitors; Registers; Simulation; Standards;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location
Seoul, Korea (South)
ISSN
0271-4302
Print_ISBN
978-1-4673-0218-0
Type
conf
DOI
10.1109/ISCAS.2012.6271410
Filename
6271410
Link To Document