A 36V biphasic stimulator with electrode monitoring circuit

A 36V, 7-bit biphasic stimulator with an electrode monitoring circuit (EMC) were implemented in a high voltage (HV) 0.35µm CMOS process. The HV devices can tolerate a gate-to-source voltage up to ∼18V. A HV switch was proposed for the EMC to monitor a rail-to-rail signal of 36V. A fast settling current mirror for the stimulator was also proposed. The settling time of the output current was reduced significantly even with relatively slow HV devices. The worst-case settling time was measured to be 3.6µs. The current efficiency of the stimulator was ∼96%. The mismatch between the anodic and cathodic outputs was <1.65%.