DocumentCode
3012842
Title
The implementation of a large array of non-linear data processor elements using FPGAs
Author
Pointon, C.T. ; Carrasco, R.A. ; Gell, M.
Author_Institution
Electron. & Commun. Group, Staffordshire Univ., Stafford, UK
fYear
1994
fDate
19-23 Sep 1994
Firstpage
265
Lastpage
268
Abstract
A large flexible array of reconfigurable nonlinear data processor elements which represent service processing elements in digital communication networks has been designed and implemented using field programmable gate arrays (FPGAs). The first test application of the array has been the study of the processor batching behaviours which frequently emerge in teletraffic systems. The results obtained from the array illustrate the capability of the array to provide insight into the dynamics and stability of multiprocessor systems
Keywords
batch processing (computers); digital communication; field programmable gate arrays; internetworking; multiprocessing systems; telecommunication computing; telecommunication traffic; FPGAs; digital communication networks; interconnected system arrays; internetworking; large flexible array; multiprocessor systems; nonlinear data processor elements; processor batching behaviours; service processing elements; teletraffic systems; Chaotic communication; Communication system control; Consumer electronics; Control systems; Digital communication; Field programmable gate arrays; Heat engines; Information processing; Laboratories; Switching systems;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC Conference and Exhibit, 1994. Proceedings., Seventh Annual IEEE International
Conference_Location
Rochester, NY
Print_ISBN
0-7803-2020-4
Type
conf
DOI
10.1109/ASIC.1994.404561
Filename
404561
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