DocumentCode :
3012859
Title :
Tile-based GPU optimizations through ESL full system simulation
Author :
Huang, Hsu-Yao ; Huang, Chi-Yuan ; Chen, Chung-Ho
Author_Institution :
Information and Communications Research Labs, Industrial Technology Research Institute, Hsinchu, Taiwan
fYear :
2012
fDate :
20-23 May 2012
Firstpage :
1327
Lastpage :
1330
Abstract :
We present a tile-based GPU design which is modeled in a full system simulation platform. The full system simulation platform includes a functional Linux-based system on which the GPU is incorporated for design explorations. To accurately estimate the execution time of the application graphics software, an execution time synchronization mechanism for the virtual platform is developed. We extend the Ericsson Texture Compression (ETC) scheme in our GPU to support alpha compression. In this way, we are able to reduce the external memory accesses to about one sixth, and speed up the rasterization engine (RE) by 35%. We also optimize the hardware-and-software data flow through the full system design platform and obtain significant improvements.
Keywords :
Benchmark testing; Graphics processing unit; Hardware; Optimization; Rendering (computer graphics); Throughput; Tiles;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location :
Seoul, Korea (South)
ISSN :
0271-4302
Print_ISBN :
978-1-4673-0218-0
Type :
conf
DOI :
10.1109/ISCAS.2012.6271485
Filename :
6271485
Link To Document :
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