Novel asynchronous registers for sequential circuits with quantum-dot cellular automata

Quantum-dot cellular automata (QCA) are nano-scale devices for implementing logic circuits. The disadvantage of QCA circuits is that its layout determines the timing of the circuit. This is the “layout = timing” problem in QCA circuits. Null convention logic (NCL) has been proposed as a solution to this problem. However the asynchronous registers used in NCL are bulky and require a large number of QCA cells. We propose a new architecture for these asynchronous registers that results in a 75% decrease in the number of QCA cells used in them. At the heart of the new register is a newly designed threshold gate. We have used the proposed register to implement an NCL-based serial adder. This new adder is fully asynchronous and therefore solves the “layout = timing” problem to a large extent. Our new adder also requires fewer QCA cells than previously proposed serial adders.