DocumentCode :
3013054
Title :
A flexible repetitive CSD code filter processor unit in CMOS
Author :
Hentschke, S. ; Herrfeld, A. ; Reifschneider, N. ; Förster, D. ; Heinemann, M. ; Wicke, R.
Author_Institution :
IPM, Kassel Univ., Germany
fYear :
1994
fDate :
19-23 Sep 1994
Firstpage :
261
Lastpage :
264
Abstract :
We introduce a filter processor unit that realizes digital nonrecursive (FIR) and recursive (IIR) filtering with optimal selectable coefficient, data wordlength and filter order. This flexibility is achieved by combination of four identical filter modules. The design is carried out in a 1.0 μ CMOS process; additionally a multiplier-free second order ΣΔ-modulator is implemented. It occupies a chip area of 87 mm2
Keywords :
CMOS digital integrated circuits; FIR filters; IIR filters; digital filters; integrated circuit design; recursive filters; 1.0 micron; CMOS process; CSD code; FIR filtering; IIR filtering; canonically signed digit; chip area; data wordlength; digital nonrecursive filtering; filter modules; filter order; filter processor unit; multiplier-free second order ΣΔ-modulator; optimal selectable coefficient; recursive filtering; CMOS process; Decoding; Digital filters; Filtering; Finite impulse response filter; Flexible structures; Hardware; IIR filters;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC Conference and Exhibit, 1994. Proceedings., Seventh Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-2020-4
Type :
conf
DOI :
10.1109/ASIC.1994.404562
Filename :
404562
Link To Document :
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