DocumentCode
3013391
Title
A high speed feature matching architecture for real-time video stabilization
Author
Huang, Keng-Yen ; Tsai, Yi-Min ; Yang, Tien-Ju ; Chen, Liang-Gee
Author_Institution
DSP/IC Lab, Graduate Institute of Electronic Engineering, National Taiwan University, Taiwan
fYear
2012
fDate
20-23 May 2012
Firstpage
1436
Lastpage
1439
Abstract
An efficient feature matching architecture targets at real-time video stabilization is revealed in this paper. For some applications, such as vehicular application, real-time video stabilization is needed to provide instant stable video input. However, feature matching is usually the bottleneck to achieve high performance. High speed feature matching architecture is proposed to accelerate the performance of video stabilization. Locality sensitive hashing (LSH) helps us realize the feature matching procedure in hardware implementation. By applying the proposed dynamic table allocation and on-chip cache mechanism, this work achieves 422K queries/s and real-time feature matching with 90% in memory reduction and more than 50% in relieving the feature bus burden of the system.
Keywords
Computer architecture; Feature extraction; Indexes; Real time systems; Resource management; Streaming media; Vectors;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location
Seoul, Korea (South)
ISSN
0271-4302
Print_ISBN
978-1-4673-0218-0
Type
conf
DOI
10.1109/ISCAS.2012.6271515
Filename
6271515
Link To Document