Title :
Fault tolerance, channel coding and arithmetic source coding combined
Author :
Redinbo, G.R. ; Manomohan, R.
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA
Abstract :
A complete source and channel coding system is protected from both channel errors and errors emanating from internal hardware failures by introducing redundancy in the source encoding and decoding procedures as well as in frequently inserting parity symbols generated by a burst-detecting convolutional code. The combined protected system can detect errors in any significant subsystems whether from transmission errors or hardware faults. The arithmetic source coding procedures are augmented with a few checking operations which detect failure effects at each iteration of the algorithm. The normal input symbol sequence has a parity symbol inserted sparsely; every n/sup th/ symbol is determined by a high-rate burst-detecting convolutional code. These parity values provide end to end error detection for channel and hardware-based errors. The favorable probability of detection performance is evaluated and the low overhead costs as measured by increased compression length of the modified source coding procedure are determined.
Keywords :
combined source-channel coding; error detection; fault tolerant computing; redundancy; arithmetic source coding; channel coding; combined protected system; end to end error detection; fault tolerance; modified source coding; parity symbol; parity symbols; source and channel coding; Arithmetic; Channel coding; Convolutional codes; Decoding; Fault detection; Fault tolerance; Protection; Redundancy; Source coding;
Conference_Titel :
Fault-Tolerant Computing, 1999. Digest of Papers. Twenty-Ninth Annual International Symposium on
Conference_Location :
Madison, WI, USA
Print_ISBN :
0-7695-0213-X
DOI :
10.1109/FTCS.1999.781051