DocumentCode
3013840
Title
NoC Design for the SoC of Image Process System of Road Mark Recognition
Author
Jia, Liu ; Li Zheing ; Shuo, Li
Author_Institution
Inst. of Micro Electron. Applic. Technol., Beijing Union Univ., Beijing, China
fYear
2010
fDate
25-27 June 2010
Firstpage
3912
Lastpage
3916
Abstract
With the analysis of basic properties, this paper proposed a SoC design of Image Process System of Road Mark Recognition (IPSRMR) based on data flow graph (DFG) model and generic regulable NoC (GRNoC). It is provided of properties of data transmission and timing for each resource module with building the system DFG model with analyzing functions and algorithm. The basic method for optimizing resources and mapping is shown by analyzing DFG model of the IPSRMR. Following the analysis results of DFG, the SoC for IPSRMR has optimized GRNoC architecture, achieves shortest data transmission paths among the resources, implements straight data transmission, increases the speed of data transmission, and reduced the requirement for data process speed of each resource. In addition, the power consumption is reduced with such a optimized architecture.
Keywords
automated highways; image recognition; integrated circuit design; network-on-chip; IPSRMR; SoC design; automatic drive system; data flow graph model; generic regulable NoC design; image process system; optimized GRNoC architecture; power consumption; road mark recognition; shortest data transmission path; system DFG model; Computer architecture; Data communication; Image processing; Process control; Roads; Switches; System-on-a-chip; DFG; Image; NoC; SoC;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Control Engineering (ICECE), 2010 International Conference on
Conference_Location
Wuhan
Print_ISBN
978-1-4244-6880-5
Type
conf
DOI
10.1109/iCECE.2010.1428
Filename
5631601
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