Design considerations on current-mode and voltage-mode control methods for half-bridge converters

The instability of the input capacitors midpoint voltage in the half-bridge topology observed using peak current-mode control is investigated and a simple solution, which does not require any modification of the converter power stage, is proposed. As far as voltage-mode control is concerned, a novel multi-loop control allows synthesis of the desired regulator transfer function by using only low-pass filters, thus reducing the high-frequency noise coupling typical of standard PID regulators and reducing the dependency of crossover frequency and phase margin on output capacitor ESR. In the paper, useful design considerations are given and verified with an experimental prototype