DocumentCode :
3014725
Title :
Hardware in the loop simulation of railway traffic re-scheduling by means of MILP algorithm
Author :
Joelianto, Endra ; Setiawan, Aan ; Chaerani, Diah
Author_Institution :
Instrum. & Control Res. Group, Bandung Inst. of Technol., Bandung, Indonesia
fYear :
2011
fDate :
15-17 Nov. 2011
Firstpage :
119
Lastpage :
124
Abstract :
The paper considers hardware in the loop simulation (HILS) of railway traffic re-scheduling during disturbances. The traffic re-scheduling during disturbances is formulated as a mixed integer linear programming (MILP) solved by using branch and bound algorithm. The HILS apparatus is then set-up to verify the results.
Keywords :
integer programming; linear programming; railways; scheduling; tree searching; HILS apparatus; MILP algorithm; branch and bound algorithm; hardware in the loop simulation; mixed integer linear programming; railway traffic rescheduling; Computer languages; HILS; MILP; Ntracks; OPC; PLC; disturbance management; railway scheduling; timetabling; train traffic;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Instrumentation Control and Automation (ICA), 2011 2nd International Conference on
Conference_Location :
Bandung
Print_ISBN :
978-1-4577-1462-7
Type :
conf
DOI :
10.1109/ICA.2011.6130141
Filename :
6130141
Link To Document :
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