DocumentCode :
3014781
Title :
A 6.24-Gb/s wide-input-range serializer ASIC using fixed-data-rate scheme
Author :
Park, Kang-Yeob ; Choi, Woo-Young ; Lee, Seon-Young ; Oh, Won-Seok
Author_Institution :
Dept. of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea
fYear :
2012
fDate :
20-23 May 2012
Firstpage :
1704
Lastpage :
1707
Abstract :
In this paper, we report a 6.24-Gb/s wide-input-range serializer ASIC using fixed-data-rate scheme that can be used for long-haul optical transmission of various display standards. The serializer includes three clock-and-data-recovery circuits, de-multiplexers, a digital processing block, a phase-locked-loop, multiplexers, and optical front-end circuits. To eliminate the need for a wide-range phase-locked loop, the fixed-data-rate scheme is used. The ASIC produces 6.24-Gb/s serialized data from parallel input signals and, with them, drives a vertical-cavity surface-emitting laser. The serializer ASIC occupies 3.45 mm2 and consumes 151.7 mW.
Keywords :
Application specific integrated circuits; Clocks; Optical fibers; Phase locked loops; Synchronization; Vertical cavity surface emitting lasers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location :
Seoul, Korea (South)
ISSN :
0271-4302
Print_ISBN :
978-1-4673-0218-0
Type :
conf
DOI :
10.1109/ISCAS.2012.6271589
Filename :
6271589
Link To Document :
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