• DocumentCode
    3015352
  • Title

    Novel cell isolation technique for the analysis of CMOS SRAM cell cold failure

  • Author

    Lim, Yit-Wooi ; Yeoh, Teong-San

  • Author_Institution
    Intel Technol. Sdn. Bhd., Penang, Malaysia
  • fYear
    1998
  • fDate
    1998
  • Firstpage
    64
  • Lastpage
    69
  • Abstract
    CMOS SRAM cell cold failure analysis is not easily performed under a room temperature environment. However, by using the signature analysis method, the transistor failure cell can be identified by directly measuring the transistor parameters from the isolated SRAM cell. The cell isolation technique for signature analysis is sensitive enough to capture the abnormal electrical signature of the SRAM cell cold failure. The technique was used on the analysis of SRAM cell cold failure from a 2-layer metal fab process. The SRAM cell and its transistors were physically and electrically isolated without any problem. The failure signature of the SRAM cell cold failure which failed stuck at “1” at a single bit address during testing, was successfully analyzed. N+ drain junction leakage and threshold voltage degradation was identified as the root cause of the cold failure
  • Keywords
    CMOS memory circuits; SRAM chips; failure analysis; fault location; integrated circuit interconnections; integrated circuit metallisation; integrated circuit reliability; integrated circuit testing; isolation technology; leakage currents; logic testing; 20 C; CMOS SRAM cell cold failure; CMOS SRAM cell cold failure analysis; N+ drain junction leakage; SRAM cell cold failure; SRAM cell transistors; abnormal electrical signature; cell isolation technique; cold failure root cause; electrical isolation; failure signature; isolated SRAM cell; physical isolation; room temperature environment; signature analysis; signature analysis method; single bit address; stuck at failure; threshold voltage degradation; transistor failure cell; transistor parameters; two-layer metal fab process; CMOS technology; Degradation; Failure analysis; Isolation technology; Probes; Random access memory; Temperature sensors; Testing; Threshold voltage; Variable structure systems;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Semiconductor Electronics, 1998. Proceedings. ICSE '98. 1998 IEEE International Conference on
  • Conference_Location
    Bangi
  • Print_ISBN
    0-7803-4971-7
  • Type

    conf

  • DOI
    10.1109/SMELEC.1998.781151
  • Filename
    781151