Systolic ROM arrays for implementing RNS FIR filters

The Residue Number System (RNS), its concept, computational power, and applications have been investigated in the past [1,6,7]. Most of the studies have resulted in realizations suitable for discrete implementation [2,8]. This paper introduces a linear systolic array architecture for an RNS based FIR filter suitable for VLSI fabrication. The array, which is completely pipelined, consists of modular cells which only communicate to their nearest neighbor. The connected cells constitute a linear systolic array, and the construction of the cell is such that it can be programmed to function in many different DSP tasks. The final result is the construction of a linear systolic ROM that effectively replaces the previously used discrete ROM arrays.