Testable ASIC design for a fuzzy logic based QRS complex detector

Author

Azad, Khandaker Abul Kalam ; Darus, Zahari Mohamed ; Ali, Mohd Alauddin Mohd

Author_Institution

Dept. of Electr. Electron. & Syst. Eng., Kebangsaan Malaysia Univ., Bangi, Malaysia

fYear

1998

fDate

1998

Firstpage

175

Lastpage

178

Abstract

This paper presents an approach towards implementing a QRS detection algorithm into a single chip environment for maternal and fetal heart rate monitoring by using a fuzzy decision method to identify maternal and fetal QRS complexes from single-lead maternal abdominal recordings. A top-down design methodology was adopted during the design of the ASIC. Testability strategies were adopted in order to increase the ASIC reliability

Keywords

application specific integrated circuits; biomedical electronics; biomedical measurement; cardiology; design for testability; fuzzy logic; integrated circuit design; integrated circuit reliability; integrated circuit testing; obstetrics; patient monitoring; ASIC design; ASIC reliability; QRS detection algorithm; fetal QRS complexes; fetal heart rate monitoring; fuzzy decision method; fuzzy logic based QRS complex detector; maternal QRS complexes; maternal heart rate monitoring; single chip environment; single-lead maternal abdominal recordings; testability strategies; testable ASIC design; top-down design methodology; Abdomen; Application specific integrated circuits; Detection algorithms; Detectors; Electrocardiography; Fetal heart rate; Fuzzy logic; Heart rate measurement; Instruments; Logic testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Semiconductor Electronics, 1998. Proceedings. ICSE '98. 1998 IEEE International Conference on

Conference_Location

Bangi

Print_ISBN

0-7803-4971-7

Type

conf

DOI

10.1109/SMELEC.1998.781174

Filename

781174