The simulation semantics of SystemC

Author

Mueller, Wolfgang ; Ruf, Juergen ; Hoffmann, Dirk ; Gerlach, Joachim ; Kropf, Thomas ; Rosenstiehl, Wolfgang

Author_Institution

C-Lab., Paderborn Univ., Germany

fYear

2001

fDate

2001

Firstpage

64

Lastpage

70

Abstract

We present a rigorous but transparent semantics definition of SystemC that covers method, thread, and clocked thread behavior as well as their interaction with the simulation kernel process. The semantics includes watching statements, signal assignment, and wait statements as they are introduced in SystemC V1.O. We present our definition in form of distributed Abstract State Machines (ASMs) rules reflecting the view given in the SystemC User´s Manual and the reference implementation. We mainly see our formal semantics as a concise, unambiguous, high-level specification for SystemC-based implementations and for standardization. Additionally, it can be used as a sound basis to investigate SystemC interoperability with Verilog and VHDL

Keywords

C++ language; formal specification; hardware description languages; operating system kernels; program compilers; programming language semantics; SystemC; VHDL; Verilog; clocked thread behavior; distributed Abstract State Machines; formal semantics; high-level specification; interoperability; signal assignment; simulation kernel process; simulation semantics; standardization; wait statements; watching statements; Algebra; Clocks; Computational modeling; Computer languages; Electronic design automation and methodology; Formal verification; Hardware design languages; Kernel; Logic functions; Yarn;

fLanguage

English

Publisher

ieee

Conference_Titel

Design, Automation and Test in Europe, 2001. Conference and Exhibition 2001. Proceedings

Conference_Location

Munich

ISSN

1530-1591

Print_ISBN

0-7695-0993-2

Type

conf

DOI

10.1109/DATE.2001.915002

Filename

915002