DocumentCode
3015898
Title
Mask extraction from optical images of VLSI circuits
Author
Jeong, Hong ; Musicus, Bruce R.
Author_Institution
Massachusetts Institute of Technology
Volume
12
fYear
1987
fDate
31868
Firstpage
602
Lastpage
605
Abstract
This paper explores line labeling algorithms for extracting the mask layers from an optical image of a VLSI chip. We first create a suitable world model for VLSI images. Next, we introduce representation schemes for object features, together with the natural constraints these features satisfy. This label set is an extension of Huffman, Clowes, and Kanade´s label sets. Finally, we show how to interpret VLSI scenes by using a constrained labeling strategy. Performance of our labeling algorithms is demonstrated on some simple but representative simulated images of CMOS logic gates.
Keywords
CMOS logic circuits; Data mining; Image segmentation; Inspection; Inverters; Labeling; Layout; Logic arrays; Logic gates; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '87.
Type
conf
DOI
10.1109/ICASSP.1987.1169622
Filename
1169622
Link To Document