Thermal budget adjustment of borophosphosilicate glass reflow-anneal for silicide process requirement

Author

Hashim, Uda ; Majlis, Burhanuddin Yeop ; Shaari, Sahbudin

Author_Institution

Semicond. Technol. Center, Kuala Lumpur, Malaysia

fYear

1998

fDate

1998

Firstpage

199

Lastpage

203

Abstract

Three process sequences of borophosphosilicate glass (BPSG) reflow have been tested and characterized. A combination of a CVD furnace and rapid thermal annealing has been used to see the impact on the BPSG reflow. Results obtained showed that the RTA process has the potential to compensate for the reduction of the CVD furnace process temperature. SEM micrographs have shown that the new BPSG process sequence exhibits similar glass flow characteristics to the conventional BPSG reflow process. On the other hand, rapid thermal annealing alone is not adequate to completely flow the glass

Keywords

borosilicate glasses; chemical vapour deposition; dielectric thin films; integrated circuit interconnections; integrated circuit metallisation; phosphosilicate glasses; rapid thermal annealing; scanning electron microscopy; thermal analysis; B2O3-P2O5-SiO2; BPSG; BPSG process sequence; BPSG reflow; BPSG reflow process; CVD furnace; CVD furnace process temperature; RTA process; SEM micrographs; borophosphosilicate glass reflow; borophosphosilicate glass reflow-anneal; glass flow characteristics; process sequences; rapid thermal annealing; silicide process requirement; thermal budget adjustment; Boron; Degradation; Electronic equipment testing; Furnaces; Glass; Rapid thermal annealing; Rapid thermal processing; Silicides; Temperature; Viscosity;

fLanguage

English

Publisher

ieee

Conference_Titel

Semiconductor Electronics, 1998. Proceedings. ICSE '98. 1998 IEEE International Conference on

Conference_Location

Bangi

Print_ISBN

0-7803-4971-7

Type

conf

DOI

10.1109/SMELEC.1998.781179

Filename

781179