Title :
Resistive Crossbar Switching Networks for Inherently Fault Tolerant Nano LUTs
Author :
Ma, X. ; Huang, J. ; Chiminazzo, F. ; Rossi, D. ; Metra, C. ; Lombardi, F.
Author_Institution :
Dept. of ECE, Northeastern Univ., Boston, MA
Abstract :
We present a detailed treatment of crossbar switching networks (R-CSNs) made of resistive elements for memory utilization (as look-up table) in a nano FPGA. Initially, a technology assessment of this technology compared with a VLSI CMOS based memory is pursued considering area and support circuitry. Then, a graph model is utilized for characterizing the effects of a single fault on the fault tolerant capabilities of a R-CSN. This is used to establish the exact analytical expression for the fault tolerance of a R-CSN in the presence of a single stuck-open/closed fault. The presented analysis confirms that small-sized R-CSNs are well suited as LUTs for FPGAs at nano scales.
Keywords :
fault tolerance; field programmable gate arrays; nanoelectronics; switching networks; table lookup; VLSI CMOS based memory; fault tolerance; graph model; look-up table; nano FPGA; nano LUTs; nanotechnology; resistive crossbar switching networks; resistive elements; single stuck-open/closed fault; CMOS technology; Circuit testing; Fabrication; Fault tolerance; Field programmable gate arrays; Manufacturing; Self-assembly; Switches; Table lookup; Wires;
Conference_Titel :
Design and Test of Nano Devices, Circuits and Systems, 2008 IEEE International Workshop on
Conference_Location :
Cambridge, MA
Print_ISBN :
978-0-7695-3379-7
DOI :
10.1109/NDCS.2008.21
