DocumentCode
3016723
Title
Using lower bounds during dynamic BDD minimization
Author
Drechsler, Rolf ; Gunther, Wolfgang
Author_Institution
Inst. of Comput. Sci., Albert-Ludwigs-Univ., Freiburg, Germany
fYear
1999
fDate
1999
Firstpage
29
Lastpage
32
Abstract
Ordered Binary Decision Diagrams (BDDs) are a data structure for representation and manipulation of Boolean functions often applied in VLSI CAD. The choice of the variable ordering largely influences the size of the BDD; its size may vary from linear to exponential. The most successful methods for finding good orderings are based on dynamic variable reordering, i.e., exchanging of neighboring variables. This basic operation has been used in various variants, like sifting and window permutation. In this paper we show that lower bounds computed during the minimization process can speed up the computation significantly. First, lower bounds are studied from a theoretical point of view. Then these techniques are incorporated in dynamic minimization algorithms. By the computation of good lower bounds large parts of the search space can be pruned resulting in very fast computations. Experimental results are given to demonstrate the efficiency of our approach
Keywords
VLSI; binary decision diagrams; circuit CAD; computational complexity; integrated circuit design; logic CAD; minimisation; Boolean functions; Ordered Binary Decision Diagrams; VLSI CAD; computational speed; data structure; dynamic BDD minimization; dynamic minimization algorithms; dynamic variable reordering; lower bounds; minimization; search space; sifting; Binary decision diagrams; Boolean functions; Computer science; Data structures; Manipulator dynamics; Minimization methods; Partitioning algorithms; Permission; Runtime; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1999. Proceedings. 36th
Conference_Location
New Orleans, LA
Print_ISBN
1-58113-092-9
Type
conf
DOI
10.1109/DAC.1999.781225
Filename
781225
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