• DocumentCode
    3016921
  • Title

    Reliability-constrained area optimization of VLSI power/ground networks via sequence of linear programmings

  • Author

    Tan, Xiang-Dong ; Shi, C. J Richard ; Lungeanu, Diana ; Lee, Jyh-Chwen ; Yuan, Li-Pen

  • Author_Institution
    Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
  • fYear
    1999
  • fDate
    1999
  • Firstpage
    78
  • Lastpage
    83
  • Abstract
    This paper presents a new method for determining the widths of the power and ground routes in integrated circuits so that the area required by the routes is minimized subject to the reliability constraints. The basic idea is to transform the resulting constrained nonlinear programming problem into a sequence of linear programs. Theoretically, we show that the sequence of linear programs always converges to the optimum solution of the relaxed convex problem. Experimental results demonstrate that the sequence-of-linear-programming method is orders of magnitude faster than the best-known method based on conjugate gradients, with constantly better optimization solutions
  • Keywords
    VLSI; circuit layout CAD; circuit optimisation; integrated circuit layout; integrated circuit reliability; linear programming; network routing; sequences; CAD tool; VLSI power/ground networks; constrained nonlinear programming problem; ground route width; optimization solutions; power ground route width; relaxed convex problem; reliability-constrained area optimization; route area minimization; sequence of linear programmings; wire segment width; Design automation; Integrated circuit reliability; Linear programming; Network servers; Optimization methods; Permission; Very large scale integration; Voltage; Wire; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 1999. Proceedings. 36th
  • Conference_Location
    New Orleans, LA
  • Print_ISBN
    1-58113-092-9
  • Type

    conf

  • DOI
    10.1109/DAC.1999.781236
  • Filename
    781236