Title :
Generalized reasoning scheme for redundancy addition and removal logic optimization
Author :
Espejo, J.A. ; Entrena, L. ; Millán, E. San ; Olías, E.
Author_Institution :
Univ. Carlos III, Madrid, Spain
Abstract :
In this work a generalization of the structural Redundancy Addition and Removal (RAR) logic optimization method is presented. New concepts based on the functional description of the nodes in the network are introduced to support this generalization. Necessary and sufficient conditions to identify all the possible structural expansions are given for the general case of multiple variable expansion. Basic nodes are no longer restricted to simple gates and can be any function of any size. With this generalization, an incremental mechanism to perform structural transformations involving any number of variables can be applied in a very efficient manner. Experimental results are presented that illustrate the efficiency of our scheme
Keywords :
circuit CAD; circuit optimisation; logic CAD; redundancy; functional description; generalized reasoning scheme; incremental mechanism; logic optimization; multiple variable expansion; redundancy addition; redundancy removal; structural expansions; structural transformations; Circuits; Electronic mail; Logic; Optimization methods; Redundancy; Space exploration; Sufficient conditions; Testing; Wire;
Conference_Titel :
Design, Automation and Test in Europe, 2001. Conference and Exhibition 2001. Proceedings
Conference_Location :
Munich
Print_ISBN :
0-7695-0993-2
DOI :
10.1109/DATE.2001.915054
