• DocumentCode
    3017243
  • Title

    Alternate Test Methodology for High Speed A/D Converter Testing on Low Cost Tester

  • Author

    Goyal, Shri ; Purtell, M.

  • Author_Institution
    Georgia Institute of Technology,USA
  • fYear
    2005
  • fDate
    18-21 Dec. 2005
  • Firstpage
    14
  • Lastpage
    17
  • Abstract
    This paper proposes a test methodology for dynamic specification testing of high-speed A/D converters on a low cost tester using the alternate test approach. In the proposed approach, regression-based mapping functions are generated, using specification data of the device from bench testing. During production testing, the dynamic specifications of the device are estimated on a low cost ATE using an alternate test set-up and the pre-developed mapping functions. As opposed to the conventional method of dynamic specification testing of A/D converters, the proposed approach does not require a spectrally pure sinusoidal input signal and estimates device SNR in presence of sampling clock jitter. Simulation results indicate specification estimation error of less than 4% using the proposed test methodology.
  • Keywords
    Circuit testing; Clocks; Costs; Equations; Frequency; Jitter; Production; Sampling methods; Semiconductor device testing; Ultrasonic imaging;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Symposium, 2005. Proceedings. 14th Asian
  • ISSN
    1081-7735
  • Print_ISBN
    0-7695-2481-8
  • Type

    conf

  • DOI
    10.1109/ATS.2005.22
  • Filename
    1575399