IDDQ Testing Method using a Scan Pattern for Production Testing

With the miniaturization of the diffusion process, the leak current per transistor tends to increase and the number of transistors per die tends to become larger, thus rendering more difficult the discrimination through the absolute value of IDDQ (Quiescent power supply current) that is required to detect defects on VLSI (Very Large Scale Integration). On the other hand, scan patterns convenient for their logical quality improvement are widely used. When adopting such a scan pattern and measuring the IDDQ, one finds that the measured values do not fluctuate greatly. In this paper, we will present a method of determining good and defective dies by making an approximation of this distribution using a gamma distribution and we will demonstrate the efficiency of our method through corroborative results.