DocumentCode :
3017632
Title :
Event reconstruction in time warp
Author :
Li, Lijun ; Tropper, Carl
Author_Institution :
Sch. of Comput. Sci., McGill Univ., Montreal, Que., Canada
fYear :
2004
fDate :
16-19 May 2004
Firstpage :
37
Lastpage :
44
Abstract :
In optimistic simulations, checkpointing techniques are often used to reduce the overhead caused by state saving. In this paper, we propose event reconstruction as a technique with which to reduce the overhead caused by event saving, and compare its memory consumption and execution time to the results obtained by dynamic checkpointing. As the name implies, event reconstruction reconstructs input events and anti-events from the differences between adjacent states, and does not save input events in the event queue. For simulations with fine event granularity and small state size, such as the logic simulation of VLSI circuitry, event reconstruction can yield an improvement in execution time as well as a significant reduction in memory utilization when compared to dynamic checkpointing. Moreover, this technique facilitates load migration because only the state queue needs to be moved from one processor to another.
Keywords :
VLSI; logic simulation; system recovery; time warp simulation; VLSI circuitry; checkpointing; event reconstruction; logic simulation; memory utilization; optimistic simulation; time warp; Checkpointing; Circuit simulation; Computer science; Costs; Discrete event simulation; Frequency; Heuristic algorithms; Logic circuits; Time warp simulation; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Simulation, 2004. PADS 2004. 18th Workshop on
ISSN :
1087-4097
Print_ISBN :
0-7695-2111-8
Type :
conf
DOI :
10.1109/PADS.2004.1301283
Filename :
1301283
Link To Document :
بازگشت