• DocumentCode
    3017637
  • Title

    Allocation and scheduling of conditional task graph in hardware/software co-synthesis

  • Author

    Xie, Yuan ; Wolf, Wayne

  • Author_Institution
    Dept. of Electr. Eng., Princeton Univ., NJ, USA
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    620
  • Lastpage
    625
  • Abstract
    This paper introduces an allocation and scheduling algorithm that efficiently handles conditional execution in multi-rate embedded system. Control dependencies are introduced into the task graph model. We propose a mutual exclusion detection algorithm that helps the scheduling algorithm to exploit the resource sharing. Allocation and scheduling are performed simultaneously to take advantage of the resource sharing among those mutual exclusive tasks. The algorithm is fast and efficient, and so is suitable to be used in the inner loop of our hardware/software co-synthesis framework which must call the scheduling routine many times
  • Keywords
    application specific integrated circuits; circuit CAD; embedded systems; graphs; hardware-software codesign; integrated circuit design; logic CAD; probabilistic logic; scheduling; conditional execution; conditional task graph; hardware/software co-synthesis; multi-rate embedded system; mutual exclusion detection algorithm; resource sharing; scheduling algorithm; task graph model; Control system synthesis; Costs; Detection algorithms; Embedded software; Embedded system; Hardware; Partitioning algorithms; Processor scheduling; Resource management; Scheduling algorithm;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe, 2001. Conference and Exhibition 2001. Proceedings
  • Conference_Location
    Munich
  • ISSN
    1530-1591
  • Print_ISBN
    0-7695-0993-2
  • Type

    conf

  • DOI
    10.1109/DATE.2001.915088
  • Filename
    915088