Design CAROM Module Used in AES Structure for Sub-byte and Inv-sub-byte Transformation

In the paper, the structure of information security system was implemented and to evaluate its performance for the securely data transmit in the network. The Advanced Encryption Standard (AES) with Rijndael algorithm is divided into two major block encryption and decryption which is operated for the iteration and the symmetric password key block cryptography with 128, 196, and 256-bit. The Content Addressable Read Only Memory (CAROM) is used to realize the Look-Up-Table approach of the Sub-Byte and Inv-Sub-Byte transformation function within the integrated operation module to execute the encryption and decryption operation in AES system is proposed to improve the execution time and complexity. The integrated modules are combined (shift Row, Sub Byte) and (AddRoundKey, Mix Column), respectively. As the simulation result show that the functions and performance of the proposed AES system with the integrated module and the ROM-base CAM circuit are successfully verified by the Verilog in the Xilinx FPGA development platform. The used logic element of CAM is effectively reduced than Look-Up-Table from read-only-memory. The execution time of the integrated AES system has a more high-speed operated for the data Enc/Dec function.