A Class of Linear Space Compactors for Enhanced Diagnostic

Author

Clouqueur, Thomas ; Fujiwara, Hideo ; Saluja, Kewal K.

Author_Institution

Graduate Sch. of Inf. Sci., Nara Inst. of Sci. & Technol.

fYear

2005

fDate

21-21 Dec. 2005

Firstpage

260

Lastpage

265

Abstract

Testing of VLSI circuits is challenged by the increasing volume of test data that adds constraints on tester memory and impacts test application time substantially. Space compactors are commonly used to reduce the test volume by one or two orders of magnitude. However, such level of compaction reduces the quality of the diagnostic of faults because it is difficult to identify the locations of errors in the compacted response. In this paper, we introduce a design of space compactors that can be used in pass/fail mode as well as in diagnostic mode with enhanced performance by trading off compaction ratio for diagnostic ability. We analyze the properties of the compactors and evaluate their performance through simulations

Keywords

Golay codes; VLSI; errors; fault diagnosis; fault location; integrated circuit testing; VLSI circuits testing; errors locations; fault diagnosis; linear space compactors; Circuit faults; Circuit testing; Compaction; Fault diagnosis; Information science; Logic testing; Memory management; Performance evaluation; Space technology; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Symposium, 2005. Proceedings. 14th Asian

Conference_Location

Calcutta

ISSN

1081-7735

Print_ISBN

0-7695-2481-8

Type

conf

DOI

10.1109/ATS.2005.7

Filename

1575439