DocumentCode
3018209
Title
Design for Cost Effective Scan Testing by Reconfiguring Scan Flip-Flops
Author
Xiang, Dong ; Li, Kai-Wei ; Fujiwra, H.
Author_Institution
Sch. of Software, Tsinghua Univ., Beijing
fYear
2005
fDate
21-21 Dec. 2005
Firstpage
318
Lastpage
323
Abstract
A new scan architecture called reconfigured scan forest is proposed for cost-effective scan testing. Multiple scan flip-flops can be grouped based on structural analysis that avoids new unstable faults due to new reconvergent fanouts. The proposed new scan architecture makes all scan flip-flop groups have similar size because of flexibility of the scan flip-flop grouping scheme, where many scan flip-flops become internal scan flip-flops. The size of the exclusive-or trees can be reduced greatly compared with the original scan forest. Therefore, area overhead and routing complexity are reduced greatly. It is shown that test application cost and test power with the proposed scan forest architecture can be reduced to even less than 1% of the conventional full scan design with a single scan chain
Keywords
flip-flops; integrated circuit design; integrated circuit testing; area overhead; cost-effective scan testing; routing complexity; scan architecture; scan flip-flops; scan forest architecture; structural analysis; trees; Character generation; Costs; Flip-flops; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 2005. Proceedings. 14th Asian
Conference_Location
Calcutta
ISSN
1081-7735
Print_ISBN
0-7695-2481-8
Type
conf
DOI
10.1109/ATS.2005.46
Filename
1575449
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