Title :
Graphical specification of digital systems using interval temporal logic
Author :
Hadjinicolaou, M.G. ; Musgrave, G. ; Hughes, R.B.
Author_Institution :
Dept. of Electr. Eng. & Electron., Brunel Univ., Uxbridge, UK
Abstract :
This paper considers by means of an example how the behaviour of a digital circuit can be synthesised from a detail specification described in Interval Temporal Logic (ITL) which itself can be derived from a timing diagram
Keywords :
logic design; temporal logic; digital circuit behaviour; digital systems; graphical specification; interval temporal logic; timing diagram; Animation; Circuit synthesis; Counting circuits; Digital circuits; Digital systems; Hardware; Logic circuits; Logic design; Process design; Timing;
Conference_Titel :
ASIC Conference and Exhibit, 1994. Proceedings., Seventh Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-2020-4
DOI :
10.1109/ASIC.1994.404589
