Title :
Heuristic datapath allocation for multiple wordlength systems
Author :
Constantinides, George A. ; Cheung, Peter Y K ; Luk, Wayne
Author_Institution :
Dept. of Electr. & Electron. Eng., Imperial Coll. of Sci., Technol. & Med., London, UK
Abstract :
This paper introduces a heuristic to solve the combined scheduling, resource building, and wordlength selection problem for multiple wordlength systems. The algorithm involves an iterative refinement of operator wordlength information, leading to a scheduled and bound data-flow graph. Scheduling is performed with incomplete wordlength information during the intermediate stages of this refinement process. Results show significant area savings over known alternative approaches
Keywords :
data flow graphs; digital signal processing chips; high level synthesis; processor scheduling; resource allocation; DFG; DSP; bound data-flow graph; heuristic datapath allocation; iterative refinement; multiple wordlength systems; operator wordlength information; refinement process; scheduled data-flow graph; Computational modeling; Delay; Digital signal processing; Distortion; Educational institutions; Energy consumption; Hardware; High level synthesis; Power system modeling; Signal synthesis;
Conference_Titel :
Design, Automation and Test in Europe, 2001. Conference and Exhibition 2001. Proceedings
Conference_Location :
Munich
Print_ISBN :
0-7695-0993-2
DOI :
10.1109/DATE.2001.915122
