DocumentCode :
3018630
Title :
A regularity-based hierarchical symbolic analysis method for large-scale analog networks
Author :
Doboli, Alex ; Vemuri, Ranga
Author_Institution :
Dept. of Electron. Comput. & Eng. Comput. Sci., Cincinnati Univ., OH, USA
fYear :
2001
fDate :
2001
Firstpage :
806
Abstract :
Summary form only given. The main challenge for any symbolic analysis method is the exponential size of the produced symbolic expressions (1011 terms for an op amp). Current research considers two ways of handling this limitation: approximation of symbolic expressions and hierarchical methods. Approximation methods retain only the significant terms of the symbolic expressions and eliminate the insignificant ones. The difficulty, however, lies in identifying what terms to eliminate and what the resulting approximation error could be. Hierarchical methods tackle the symbolic analysis problem in a divide-and-conquer manner. They consider only one part of the global network at a time and then recombine partial expressions for finding overall symbolic formulas. Existing hierarchical methods have a main limitation in that they are not feasible for addressing networks that are built of tightly coupled blocks, i.e. operational amplifiers. The originality of our research stems from exploiting regularity aspects for addressing the exponential size of produced symbolic expressions. As a result, polynomial-size models are obtained for any network, including networks formed of tightly coupled blocks. Two kinds of regularity aspects were identified
Keywords :
analogue integrated circuits; divide and conquer methods; integrated circuit modelling; large-scale systems; symbol manipulation; divide-and-conquer manner; exponential size; large-scale analog networks; partial expressions; polynomial-size models; regularity-based hierarchical symbolic analysis method; tightly coupled blocks; Analog integrated circuits; Approximation error; Circuits and systems; Contracts; Equations; Filters; Large-scale systems; Operational amplifiers; Partitioning algorithms; Polynomials;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe, 2001. Conference and Exhibition 2001. Proceedings
Conference_Location :
Munich
ISSN :
1530-1591
Print_ISBN :
0-7695-0993-2
Type :
conf
DOI :
10.1109/DATE.2001.915132
Filename :
915132
Link To Document :
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