Abstract :
In this talk, the EDT technology was introduced briefly along with a description of the hardware and the methodology used to achieve high test-data compression. The advantages of the approach in terms of encoding capacity, ability to handle unknowns, minimal hardware overhead, and close resemblance to a conventional ATPG flow were discussed. Since the technology requires very few pins to drive the decompressor from an ATE and observe responses at the output, it is attractive for burn-in test, core test, multisite testing, and is suitable for parts tested on VLCTs. The presentation touched upon these test techniques that directly benefit from using the proposed solution. With newer technology nodes, diagnosis is becoming critical for yield ramp up, faster time to volume, and first silicon debug. No compression solution is complete without an easy way to diagnose failures during manufacturing test. The ability to perform direct diagnosis from compressed patterns within the EDT framework were presented
Keywords :
automatic test equipment; automatic test pattern generation; data compression; ATPG flow; EDT technology; automatic test equipment; automatic test pattern generation; burn-in test; core test; embedded deterministic test; multisite testing; test data compression; test quality; Circuit faults; Circuit testing; Costs; Electrical fault detection; Geometry; Graphics; Hardware; Manufacturing industries; Solid modeling; Test data compression;