Susceptibility of analog cells to substrate interference

Author

Fiori, Franco

Author_Institution

Dipartimento di Elettronica, Politecnico di Torino, Italy

fYear

2001

fDate

2001

Firstpage

814

Abstract

This paper deals with the susceptibility of smart power integrated circuits to substrate interference. In particular, propagation of RF interference through substrate and its effects on analog cells are investigated. A new method, developed to identify a parasitic substrate-coupling network in VLSI devices, has been customized for a smart power technology process. The layout view of a specific circuit is elaborated in order to extract a netlist composed of circuits in the die surface and the substrate parasitic network. Predictions are obtained by executing time-domain simulations. A simple test circuit composed of a power transistor and an OTA is considered. Investigations are carried out for various layout of the same rest circuit and the effectiveness of shielding substrate contacts is evaluated

Keywords

VLSI; analogue integrated circuits; computer power supplies; power integrated circuits; power supply circuits; radiofrequency interference; RF interference; VLSI devices; analog cells; netlist; parasitic substrate-coupling network; shielding substrate contacts; smart power integrated circuits; substrate interference; substrate parasitic network; time domain simulation; time-domain simulation; Circuit simulation; Circuit testing; Electromagnetic interference; Integrated circuit technology; Power integrated circuits; Power transistors; Predictive models; Radiofrequency identification; Time domain analysis; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Design, Automation and Test in Europe, 2001. Conference and Exhibition 2001. Proceedings

Conference_Location

Munich

ISSN

1530-1591

Print_ISBN

0-7695-0993-2

Type

conf

DOI

10.1109/DATE.2001.915153

Filename

915153