DocumentCode
3019222
Title
Session WA6b: SOC architectures and applications
Author
Deprettere, E.
fYear
2010
fDate
7-10 Nov. 2010
Firstpage
2109
Lastpage
2110
Abstract
The following topics are dealt with: PRET architecture supporting concurrent program; time-predictable chip-multiprocessor design; real-time signal processing; and heterogeneous multiprocessor array.
Keywords
concurrent engineering; signal processing; system-on-chip; PRET architecture; SOC architecture; chip-multiprocessor design; concurrent program; heterogeneous multiprocessor array; real-time signal processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Signals, Systems and Computers (ASILOMAR), 2010 Conference Record of the Forty Fourth Asilomar Conference on
Conference_Location
Pacific Grove, CA
ISSN
1058-6393
Print_ISBN
978-1-4244-9722-5
Type
conf
DOI
10.1109/ACSSC.2010.5757921
Filename
5757921
Link To Document