DocumentCode :
3019307
Title :
NetVP: A system-level NETwork Virtual Platform for network accelerator development
Author :
Wang, Chen-Chieh ; Lo, Sheng-Hsin ; Liu, Yao-Ning ; Chen, Chung-Ho
Author_Institution :
Inst. of Comput. & Commun. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
fYear :
2012
fDate :
20-23 May 2012
Firstpage :
249
Lastpage :
252
Abstract :
In this paper, we propose a Network Virtual Platform (NetVP) to develop and verify network accelerator like an IPsec processor. The NetVP provides on-line verification mechanism and is suitable for ESL top-down design flow, supporting developments of un-timed as well as timed models. System development using this NetVP is efficient and flexible since it allows the designer to explore design spaces such as the network bandwidth and system architecture easily.
Keywords :
IP networks; virtual private networks; IPsec processor; NetVP; design space; network accelerator development; network bandwidth; online verification mechanism; system architecture; system development; system level network virtual platform; timed model; top-down design flow; Computer architecture; Computers; IP networks; Linux; Protocols; Servers; Sockets;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location :
Seoul
ISSN :
0271-4302
Print_ISBN :
978-1-4673-0218-0
Type :
conf
DOI :
10.1109/ISCAS.2012.6271806
Filename :
6271806
Link To Document :
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