DocumentCode :
301934
Title :
A novel clock feed-through distortion cancellation method for SI-circuits
Author :
Lindfors, Saska ; Halonen, Kari
Author_Institution :
Electron. Circuit Design Lab., Helsinki Univ. of Technol., Espoo, Finland
Volume :
1
fYear :
1996
fDate :
12-15 May 1996
Firstpage :
61
Abstract :
A novel method that, in theory, cancels all clock feed-through distortion in SI-circuits is presented and verified by simulations. Sensivity of the distortion cancellation is discussed and it is shown to be negligible for other parameters than switch transistor sizes and clock skew. It is demonstrated with a simulation that a significant improvement in linearity can be obtained even after moderate process variations
Keywords :
CMOS analogue integrated circuits; analogue processing circuits; electric distortion; sensitivity analysis; switched current circuits; timing; SI-circuits; clock feedthrough distortion cancellation; clock skew; switch transistor sizes; Artificial intelligence; Bandwidth; Clocks; Equations; Linearity; MOS devices; Sampling methods; Switches; Transconductance; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
Conference_Location :
Atlanta, GA
Print_ISBN :
0-7803-3073-0
Type :
conf
DOI :
10.1109/ISCAS.1996.539808
Filename :
539808
Link To Document :
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